Page 54 - Vectrawave - eCatalog
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Head Office : Z.I. des Loges, rue de la Croix Blanche - 78350 Les Loges en Josas - France
Website :
• Phone : + 33 (0)619 870 560 • Fax : +33 (0)139 564 012 • Mail :
VectraWave Proprietary information subject to change without notice
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RFIC : VWA 50023 AA
VWA 50023AAA DS Rev 0.4
DATA SHEET
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Head Office : rue de la Croix Blanche - Immeuble LOGI
–
78350
France
+ 33 (0)619 870 560
+33 (0)139 564 012
mail :
VWA 50023AAA DS Rev 0.4
VectraWave Proprietary information subject to change without notice
July 2011 p 2 /8
Chip pin out
Name
Type
Description
Gnd1*
Bias in/out
Ground for clock signal access. To be used with Gnd2 as ground plane for coplanar access.
CLKin
RF input
Clock signal input.
Internally DC decoupled (no external series decoupling capacitor required). Is
100
Ω
differential with CLKinx
CLKinx
RF input
Complementary clock signal input.
Internally DC decoupled (no external series decoupling capacitor
required). Is 100
Ω
differential with CLKin.
Gnd2*
Bias in/out
Ground for clock signal access. To be used with Gnd1 as ground plane for coplanar access.
GndCoder
Bias in/out
Coder core ground access. Is in series with an integrated inductor used to filter the common mode signal
due to switching. Can be grounded with an additional external inductor if needed.
Gnd3*
Bias in/out
Ground for signal driver output. To be used with Gnd4 as ground plane for coplanar access.
DriverOut
RF output
RF signal out. The driver uses a 50
Ω
resistor load in order to be consistent with 50
Ω
:
has to be loaded if
not used.
