Head Office : Z.I. des Loges, rue de la Croix Blanche - 78350 Les Loges en Josas - France
Website :
www.vectrawave.com
• Phone : + 33 (0)619 870 560 • Fax : +33 (0)139 564 012 • Mail :
info@vectrawave.com
VectraWave Proprietary information subject to change without notice
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RFIC : VWA 50030 AA
VWA 50030 AAAA DS Rev 0.3
D
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Head Office : rue de la Croix Blanche - Immeuble LOGI
–
78350
France
http://www.vectrawave.com
+ 33 (0)619 870 560
+33 (0)139 564 012
mail :
info@vectrawave.com
VWA 50030 AAAA DS Rev 0.3
VectraWave Proprietary information subject to change without notice
July 11
p 3 /6
Snglx
Digital out
High (VCC) if no input signal
Sngl
Digital out
High if input signal: Snglx complementary
VCC_Coder
Bias in/out
Main chip bias: biases the chip drivers, the amplifier core and the first driver stages.
VCC_bg
Bias in/out
Chip reference voltage and current bias. Is separated from the main bias to ensure a proper DC filtering
Gnd_bg
Bias in/out
Chip reference voltage and current ground. Is not physically connected to the RF grounds.
Gnd3*
Bias in/out
Ground for input signal access. To be used with Gnd4 as ground plane for coplanar access.
Nrz_in
RF input
Digital signal input.
DC is present on the access. Has to be DC decoupled from the external source
by an external capacitor.
Is 100
Ω
differential referenced to Nrz_inx.
Nrz_inx
RF input
Complementary digital signal input.
DC is present on the access. Has to be DC decoupled from the
external source by an external capacitor
.
Is 100
Ω
differential referenced to Nrz_in.
Gnd4*
Bias in/out
Ground for input signal access. To be used with Gnd3 as ground plane for coplanar access.
All pads are octogonal (w / l µm²) = 66 / 105; except VCC_Coder = 75 / 105
Die thickness = 0.28 mm (11 mils)
No metallization on back side