Head Office : Z.I. des Loges, rue de la Croix Blanche - 78350 Les Loges en Josas - France
Website :
www.vectrawave.com
• Phone : + 33 (0)619 870 560 • Fax : +33 (0)139 564 012 • Mail :
info@vectrawave.com
VectraWave Proprietary information subject to change without notice
126
4/5
Hight Speed Communication / RF - Optical Assemblies : VLI 00005 AA
VLI00005 AA xx DS Rev0.1
DATA SHEET
VLI
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Li
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Head Office : rue de la Croix Blanche - Immeuble LOGI – 78350 France
http://www.vectrawave.com
+ 33 (0)619 870 560
+33 (0)139 564 012
mail :
info@vectrawave.com
VLI 00005 AA xx DS Rev0.1
VectraWave Proprietary information subject to change without notice
February 08 p 4 /5
Signals description
Signal
Symbol Function
Signal Control
SC Automatic mode (sc switch at 0):“1” level allows current Ip to pass in optoelectronic
device, trigged on positive transition of Clock signal. Logical “0” level stops the current.
Semi-automatic mode (sc switch at 1): No trigger function of Clock signal. A “1” level
allows current Ip to pass in optoelectronic device. Logical “0” level stops the current.
Clock
Clk
Active on positive transition. On automatic mode, synchronizes SCl, A, B, C and D signals.
Amplitude
control A
A Bit 1 - LSB (among 4) defining current increase
Ip above Ip.
Amplitude
control B
B
Bit 2 (among 4) defining current increase
Ip above Ip.
Amplitude
control C
C Bit 3 (among 4) defining current increase
Ip above Ip.
Amplitude
control D
D Bit 4 - MSB (among 4) defining current increase
Ip above Ip.
Truth table and chronogram
SC A B C D CLK BT sc a b c d
I (Current)
0
X X X X X 0 0 0 0 0 0
Ibias
1 0 0 0 0
0 0 0 0 0 0
Ibias + Ip
1
A B C D
0 0 0 0 0 0
Ibias + Ip + I
p
X X X X X X 1 X 0 0 0 0 Ibias + Ip
X X X X X X 1 X a b c d Ibias + Ip + I
p
0
X X X X X 0 1 0 0 0 0
Ibias
1 0 0 0 0
X 0 1 0 0 0 0 Ibias + Ip
1
A B C D X 0 1 0 0 0 0 Ibias + Ip
1
A B C D
0 1 0 0 0 0
Ibias + Ip + I
p
Input Signals (LVPECL)
Switchs Front Panel
ABCD
(
Ip)
Signal Control
CLK
Current
0000
1111
Ibias
Ip
Ip+
Ip
1010
Current dynamics
Figures 1 and 2 show the Ip and
Ip maximum current dynamics for two different board settings.
Ip is set manually between IpL and IpH using Ip+ / Ip- buttons. The Ip value is automatically stored in a non volatile
memory. Current value can be monitored through a test point (connect a volt meter).
On board switch “SW7” splits the current dynamic in two parts, with a ratio of 2 for the maximum current.
Figures 1 and 2 bellow show the current Ip+
Ip (mA) as function of Ip and
Ip commands.
1
5
9
13
17
21
25
29
33
37
41
45
49
53
57
61
65
S1
S5
S9
S13
0
100
200
300
400
500
600
Ip
Ip
1
5
9
13
17
21
25
29
33
37
41
45
49
53
57
61
65
S1
S5
S9
S13
0
100
200
300
400
500
600
700
800
900
Ip
Ip
Fig 1 : Medium current setting dynamics
Fig 2 : High current setting dynamics